I am a final-year PhD student in the Department of Computer Science at the University of Virginia, advised by Prof. Samira Khan. My research interest lies in computer architecture and systems, specifically in system for the new Persistent Memory (PM) technologies. Before that, I received my B.S degree from both Shanghai Jiaotong University (SJTU) and the University of Michigan (UM) through the Dual-Degree Program in 2016.

My research is generously supported by Google Fellowship Award.

Email: sihangliuvirginia.edu

I will join as an assistant professor in the School of Computer Science at the University of Waterloo in January 2023.

Testing for PM Software Systems

The persistent memory (PM) technology becomes available as the release of Intel's Optane DC Persistent Memory (DCPMM). The software can directly manage persistent data in PM to take advantage of PM's high performance, byte-addressability, and durability, without going through software indirections. Different types of PM software systems are being developed, such as PM-optimized file systems, databases and key-value stores, and custom applications. A key requirement of these PM software systems is that their persistent data need to be recoverable in event of a failure, such as power outage and system crash, which is usually referred to as the crash consistency guarantee. However, it is not trivial to provide such guarantees. The software needs to carefully manage the order of writes to PM using low-level primitives or PM libraries. My research has provided testing approaches and implemented open-sourced testing tools, PMTest, XFDetector, and PMFuzz to assist programmers to detect and fix bugs that can cause inconsistencies after failure.

Hardware Support for PM Systems

Persistent memory (PM) is a unification of the conventional memory and storage devices, by providing fast, direct, and byte-addressable access to persistent data. Therefore, PM also requires existing memory and storage supports, in order to integrate PM into practical systems, such as data encryption, integrity verification, wear-leveling, and compression. These operations target different functionalities but have one issue in common, that is the increase of write latency. PM programs require frequent writeback of data to ensure program's recoverability in event of a failure. Thus, the write latency can be performance-critical to PM systems. As these operations usually bring metadata that needs to be in-sync with the associated data block, maintaining the crash consistency guarantee is another challenge for systems with these operations. My research aims to ensure a seamless integration of these operations into PM systems.

Carbink: Fault-Tolerant Far Memory

Yang Zhou, Hassan Wassel, Sihang Liu, Jiaqi Gao, James Mickens, Minlan Yu, Chris Kennelly, Paul Turner, David Culler, Hank Levy, and Amin Vahdat

USENIX Symposium on Operating Systems Design and Implementation (OSDI), 2022

PIMProf: An Automated Program Profiler for Processing-in-Memory Offloading Decisions

Yizhou Wei, Minxuan Zhou, Sihang Liu, Korakit Seemakhupt, Tajana Rosing, and Samira Khan

Design, Automation, and Test in Europe Conference (DATE), 2022

[pdf][Source Code]

Write Prediction for Persistent Memory Systems

Suyash Mahar, Sihang Liu, Korakit Seemakhupt, Vinson Young, and Samira Khan

The International Symposium on Parallel Architectures and Compilation Techniques (PACT), 2021

[pdf][Slides][Video][Source Code]

Artifact Available, Artifact Evaluated--Reusable, and Results Reproduced

PMNet: In-network Data Persistence

Korakit Seemakhupt, Sihang Liu, Yasas Senevirathne, Muhammad Shahbaz, and Samira Khan

The International Symposium on Computer Architecture (ISCA), 2021

[pdf][Slides][Video][Source Code]

PMFuzz: Test Case Generation for Persistent Memory Programs

Sihang Liu*, Suyash Mahar*, Baishakhi Ray, and Samira Khan

The International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2021

[pdf][summary slides][Source Code]

Artifact Available, Artifact Evaluated--Functional, and Results Reproduced

Cross-Failure Bug Detection in Persistent Memory Programs

Sihang Liu, Korakit Seemakhupt, Yizhou Wei, Thomas Wenisch, Aasheesh Kolli, and Samira Khan

The International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2020

[pdf][Talk][Slides][Source Code]

Artifact Available and Artifact Evaluated--Functional, Featured at PIRL 2020

Janus: Optimizing Memory and Storage Support for Non-Volatile Memory Systems

Sihang Liu, Korakit Seemakhupt, Gennady Pekhimenko, Aasheesh Kolli, and Samira Khan

The International Symposium on Computer Architecture (ISCA), 2019

[pdf][Lightning Talk][Slides]

2019 MICRO Top Picks--Honorable Mention

PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs

Sihang Liu, Yizhou Wei, Jishen Zhao, Aasheesh Kolli, and Samira Khan

The International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2019

[pdf][Lightning Talk][Slides][Source Code]

NVMW Memorable Paper Award Finalist

Crash Consistency in Encrypted Non-volatile Main Memory Systems

Sihang Liu, Aasheesh Kolli, Jinglei Ren, and Samira Khan

IEEE International Symposium on High Performance Computer Architecture (HPCA), 2018

[pdf][Lightning Talk][Slides]

Delegated Persist Ordering

Aasheesh Kolli, Jeff Rosen, Stephan Diestelhorst, Ali Saidi, Steven Pelley, Sihang Liu, Peter M. Chen, and Thomas F. Wenisch

Annual IEEE/ACM International Symposium on Microarchitecture (MICRO), 2016

[pdf]

MultiPIM: A Detailed and Configurable Multi-Stack Processing-In-Memory Simulator

Chao Yu, Sihang Liu, and Samira Khan

Computer Architecture Letters (CAL), 2021

[pdf][Source Code]

Side Channel Attacks in Computation Offloading Systems with GPU Virtualization

Sihang Liu, Yizhou Wei, Jianfeng Chi, Faysal Hossain Shezan, and Yuan Tian

IEEE Workshop on the Internet of Safe Things (SafeThings), held in association with IEEE Symposium on Security and Privacy (Oakland), 2019

[pdf][Slides]

ARMOR: Towards Restricted Approximation with A Worst-Case Guarantee

Sihang Liu, Kevin Angstadt, Mike Ferdman, and Samira Khan

Workshop on Approximate Computing Across the Stack (WAX), held in association with the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), 2018

[pdf][Slides]

Deconstructing the Tail at Scale Effect Across Network Protocols

Akshitha Sriraman, Sihang Liu, Sinan Gunbay, Shan Su, and Thomas F. Wenisch

Workshop on Duplicating, Deconstructing, and Debunking (WDDD) held in association with the International Symposium on Computer Architecture (ISCA), 2016

[pdf]

PMFuzz: Test Case Generation for Persistent Memory Programs

At the 2021 International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Virtual Conference. [Slides]

Cross-Failure Bug Detection in Persistent Memory Programs

At the 2020 International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), Virtual Conference. [Slides]

Janus: Optimizing Memory and Storage Support for Non-Volatile Memory Systems

At the 2019 International Symposium on Computer Architecture (ISCA) in Phoenix, AZ. [Slides]

Side Channel Attacks in Computation Offloading Systems with GPU Virtualization

At the 2019 IEEE Workshop on the Internet of Safe Things (SafeThings), held in association with IEEE Symposium on Security and Privacy (Oakland) in San Francisco, CA. [Slides]

PMTest: A Fast and Flexible Testing Framework for Persistent Memory Programs

At the 2019 International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) in Providence, RI. [Slides]

ARMOR: Towards Restricted Approximation with A Worst-Case Guarantee

At the 2018 Workshop on Approximate Computing Across the Stack (WAX), held in association with the International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS) in Williamsburg, VA. [Slides]

Crash Consistency in Encrypted Non-volatile Main Memory Systems

At the 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA) in Vienna, Austria. [Slides]

Board Member of the Computer Architecture Student Association (CASA) (1/2022 - Present)

Computer Architecture Long-term Mentoring (CALM) Co-chair (9/2021 - Present)

TACO'22 Reviewer (11/2021)

ISCA'22 External Reviewer (11/2021)

ASPLOS'22 External Reviewer (8/2021)

MICRO'21 Artifact Evaluation Student Chair (8/2021)

TPDS'21 Reviewer (6/2021)

OSDI'21 Artifact Reviewer (5/2021)

"My CS PhD" Info Session Panelist (4/2021)

CLUS'21 Reviewer (3/2021)

EuroSys'21 Artifact Reviewer (03/2021)

ASPLOS'21 Artifact Reviewer (01/2021)

CLUS'20 Reviewer (10/2020)

OSDI'20 Artifact Reviewer (10/2020)

ISCA'20 Volunteer (06/2020)

ASPLOS'20 Artifact Reviewer (12/2020)

ToS'20 Reviewer (12/2019)